1. Field of the Invention
The present invention is related to a comparator circuit, which is a fundamental component circuit of the integrated circuit technology, and is related, in particular, to a circuit technology to achieve power reduction of the comparator circuit.
2. Description of the Related Art
A variety of electronic equipments around us are currently configured to include semiconductor integrated circuits. Power reductions of the semiconductor integrated circuits have been achieved by scale shrinkage of device components and power supply voltage reduction. However, it is estimated that the device scale shrinkage approaches its limit, and a low-power consumption design technology making good use of circuit technologies is indispensable in order to achieve a further power reduction.
The comparator circuit is one of the most fundamental component circuits among electronic circuits. FIG. 1 shows a circuit symbol diagram of a comparator circuit. The comparator circuit has an input voltage terminal T1, a reference voltage terminal T2 and an output voltage terminal T3, compares an input voltage VIN with a reference voltage VREF, and outputs a logical value corresponding to it. That is, a logical value of “0” or “1” is outputted depending on whether the input voltage VIN is larger or smaller than the reference voltage VREF. There is an analog-to-digital converter to convert an analog signal into a digital signal as an application example. In a majority of analog-to-digital converters, the performance of the comparator circuit has a decisive influence on the total performance. Besides this, comparator circuits are used in a variety of application circuits such as digital-to-analog converters, oscillators, voltage detectors, zero-cross detectors, peak voltage detectors and full-wave rectifiers. Comparator circuits, which are often used by a large number of analog digital mixed signal LSI technologies, are fundamental component circuits for which the power consumption reduction is earnestly demanded.
FIG. 2 is a circuit diagram showing a configuration of a 2-stage comparator circuit according to a first prior art. The comparator circuit is configured to include the following:
(a) a gate bias voltage generator circuit 11, which is configured to include a bias current source 11A having a current IREF and a p-channel MOSFET (p-channel MOSFET is hereinafter referred to as pMOSFET) Q11;
(b) a differential amplifier 12, which is configured to include three pMOSFETs Q21 to Q23 and two n-channel MOSFETs (n-channel MOSFET is hereinafter referred to as nMOSFET) Q24 to Q25; and
(c) a source-grounded amplifier 13, which is configured to include a pMOSFET Q31 and an nMOSFET Q32.
The differential amplifier compares two input signals, i.e., the input voltage VIN and the reference voltage VREF with each other. Since a tail current ITAIL totally flows through the MOSFET Q23 on the input voltage VIN side when the input voltage VIN is lower than the reference voltage VREF, an output voltage VO of the differential amplifier 12 is indicative of high level. Conversely, since the tail current VTAIL flowing through the MOSFET Q21 totally flows through the MOSFETs Q22 and Q24 on the reference voltage VREF side when the input voltage VIN is higher than the reference voltage VREF, the output voltage VO of the differential amplifier 12 is indicative of low level. Since the drain voltage of the MOSFET Q21 through which the tail current ITAIL flows has a finite voltage value, the high level of the output voltage of the differential amplifier does not make a full swing from a ground potential to a power supply voltage VDD. Moreover, since the voltage gain of the simple differential amplifier 12 is often insufficient, the source-grounded amplifier 13 of the subsequent stage is utilized. With this arrangement, the output voltage VOUT exhibits a characteristic that makes a steep full swing. Therefore, in the 2-stage comparator circuit of FIG. 2, the output voltage VOUT is indicative of low level when the input voltage VIN is lower than the reference voltage VREF, and the output voltage VOUT is indicative of high level when the input voltage VIN is higher than the reference voltage VREF.